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ERROR: Unable to parse source file : /home/adieumeg/Documents/Repositories/lustrec-tests/vhdl_json/vhdl_files/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ch_14_fg_14_01.vhd
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ERROR: Parse error at line 118 column 20:
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108: 
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110: -- code from book (in Figure 14-11)
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111: 
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112:                library cell_lib;
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113: 
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114:                configuration identical_cells of register_tristate is
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115: 
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116:                  for cell_level
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117: 
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118:                    for cell_array
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                        ^
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119: 
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120:                    for cell_storage : D_flipflop
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121:                    use entity cell_lib.D_flipflop(synthesized);
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122:                end for;
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123: 
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124:                for cell_buffer : tristate_buffer
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125:                  use entity cell_lib.tristate_buffer(synthesized);
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126:                end for;
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127: 
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128:                end for;
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WARN: Missing blame information for the following files:
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WARN:   * ch_14_fg_14_01.vhd
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