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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version.
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_08_fg_08_01.vhd,v 1.1.1.1 2001-08-22 18:20:48 paw Exp $
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-- $Revision: 1.1.1.1 $
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--
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-- ---------------------------------------------------------------------
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-- code from book
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package cpu_types is
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constant word_size : positive := 16;
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constant address_size : positive := 24;
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subtype word is bit_vector(word_size - 1 downto 0);
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subtype address is bit_vector(address_size - 1 downto 0);
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type status_value is ( halted, idle, fetch, mem_read, mem_write,
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io_read, io_write, int_ack );
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end package cpu_types;
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-- end code from book
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package fg_08_01 is
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constant status :
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-- code from book
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work.cpu_types.status_value
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-- end code from book
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:=
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-- code from book
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work.cpu_types.status_value'(work.cpu_types.fetch)
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-- end code from book
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;
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end package fg_08_01;
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