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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version.
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_07_ch_07_06.vhd,v 1.3 2001-10-26 16:29:34 paw Exp $
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-- $Revision: 1.3 $
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--
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-- ---------------------------------------------------------------------
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entity ch_07_06 is
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end entity ch_07_06;
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library bv_utilities;
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use bv_utilities.bv_arithmetic;
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architecture test of ch_07_06 is
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begin
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process_07_5_b : process is
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-- code from book:
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function "+" ( left, right : in bit_vector ) return bit_vector is
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begin
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-- . . .
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-- not in book
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return bv_arithmetic."+"(left, right);
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-- end not in book
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end function "+";
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variable addr_reg : bit_vector(31 downto 0);
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-- . . .
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-- end of code from book
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-- code from book:
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function "abs" ( right : in bit_vector ) return bit_vector is
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begin
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-- . . .
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-- not in book
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if right(right'left) = '0' then
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return right;
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else
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return bv_arithmetic."-"(right);
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end if;
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-- end not in book
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end function "abs";
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variable accumulator : bit_vector(31 downto 0);
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-- . . .
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-- end of code from book
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begin
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-- code from book:
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addr_reg := addr_reg + X"0000_0004";
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-- end of code from book
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accumulator := X"000000FF";
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-- code from book:
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accumulator := abs accumulator;
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-- end of code from book
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accumulator := X"FFFFFFFE";
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accumulator := abs accumulator;
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wait;
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end process process_07_5_b;
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end architecture test;
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