Project

General

Profile

Download (2.88 KB) Statistics
| Branch: | Tag: | Revision:
1

    
2
-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
3

    
4
-- This file is part of VESTs (Vhdl tESTs).
5

    
6
-- VESTs is free software; you can redistribute it and/or modify it
7
-- under the terms of the GNU General Public License as published by the
8
-- Free Software Foundation; either version 2 of the License, or (at
9
-- your option) any later version. 
10

    
11
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
12
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13
-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14
-- for more details. 
15

    
16
-- You should have received a copy of the GNU General Public License
17
-- along with VESTs; if not, write to the Free Software Foundation,
18
-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
19

    
20
-- ---------------------------------------------------------------------
21
--
22
-- $Id: ch_15_alu-b.vhd,v 1.3 2001-10-26 16:29:35 paw Exp $
23
-- $Revision: 1.3 $
24
--
25
-- ---------------------------------------------------------------------
26

    
27
library bv_utilities;
28
use bv_utilities.bv_arithmetic.all;
29

    
30
architecture behavior of alu is
31

    
32
begin
33

    
34
  alu_op: process ( s1, s2, func ) is
35

    
36
                                     variable bv_s1, bv_s2 : dlx_bv_word;
37
                                   variable temp_result : dlx_bv_word;
38
                                   variable temp_overflow : boolean;
39

    
40
                                   type boolean_to_X01_table is array (boolean) of X01;
41
                                   constant boolean_to_X01 : boolean_to_X01_table := ( '0', '1' );
42

    
43
  begin
44
    bv_s1 := To_bitvector(s1);
45
    bv_s2 := To_bitvector(s2);
46
    temp_overflow := false;
47
    case func is
48
      when alu_pass_s1 =>
49
        temp_result := bv_s1;
50
      when alu_pass_s2 =>
51
        temp_result := bv_s2;
52
      when alu_and =>
53
        temp_result := bv_s1 and bv_s2;
54
      when alu_or =>
55
        temp_result := bv_s1 or bv_s2;
56
      when alu_xor =>
57
        temp_result := bv_s1 xor bv_s2;
58
      when alu_sll =>
59
        temp_result := bv_s1 sll bv_to_natural(bv_s2(27 to 31));
60
      when alu_srl =>
61
        temp_result := bv_s1 srl bv_to_natural(bv_s2(27 to 31));
62
      when alu_sra =>
63
        temp_result := bv_s1 sra bv_to_natural(bv_s2(27 to 31));
64
      when alu_add =>
65
        bv_add(bv_s1, bv_s2, temp_result, temp_overflow);
66
      when alu_addu =>
67
        bv_addu(bv_s1, bv_s2, temp_result, temp_overflow);
68
      when alu_sub =>
69
        bv_sub(bv_s1, bv_s2, temp_result, temp_overflow);
70
      when alu_subu =>
71
        bv_subu(bv_s1, bv_s2, temp_result, temp_overflow);
72
      when others =>
73
	report "illegal function code" severity error;
74
	temp_result := X"0000_0000";
75
    end case;
76
    result <= To_X01(temp_result) after Tpd;
77
    zero <= boolean_to_X01(temp_result = X"0000_0000") after Tpd;
78
    negative <= To_X01(temp_result(0)) after Tpd;
79
    overflow <= boolean_to_X01(temp_overflow) after Tpd;
80
  end process alu_op;
81

    
82
end architecture behavior;
(405-405/534)