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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version. 
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for more details. 
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_11_fg_11_08.vhd,v 1.2 2001-10-26 16:29:35 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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package fg_11_08 is
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  type std_ulogic is ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-');
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  type std_ulogic_vector is array ( natural range <> ) of std_ulogic;
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  function resolved ( s : std_ulogic_vector ) return std_ulogic;
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end package fg_11_08;
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package body fg_11_08 is
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  -- code from book
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  type stdlogic_table is array (std_ulogic, std_ulogic) of std_ulogic;
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  constant resolution_table : stdlogic_table :=
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    -- ---------------------------------------------
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    --  'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-'
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    -- ---------------------------------------------
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    ( ( 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U' ),  --  'U'
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      ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' ),  --  'X'
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      ( 'U', 'X', '0', 'X', '0', '0', '0', '0', 'X' ),  --  '0'
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      ( 'U', 'X', 'X', '1', '1', '1', '1', '1', 'X' ),  --  '1'
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      ( 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', 'X' ),  --  'Z'
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      ( 'U', 'X', '0', '1', 'W', 'W', 'W', 'W', 'X' ),  --  'W'
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      ( 'U', 'X', '0', '1', 'L', 'W', 'L', 'W', 'X' ),  --  'L'
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      ( 'U', 'X', '0', '1', 'H', 'W', 'W', 'H', 'X' ),  --  'H'
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      ( 'U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X' )   --  '-'
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      );
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  function resolved ( s : std_ulogic_vector ) return std_ulogic is
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    variable result : std_ulogic := 'Z';  -- weakest state default
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  begin
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    if s'length = 1 then
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      return s(s'low);
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    else
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      for i in s'range loop
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        result := resolution_table(result, s(i));
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      end loop;
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    end if;
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    return result;
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  end function resolved;
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  -- end code from book
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end package body fg_11_08;
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