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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version. 
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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-- for more details. 
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_07_fg_07_13.vhd,v 1.2 2001-10-26 16:29:34 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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entity fg_07_13 is
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end entity fg_07_13;
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architecture test of fg_07_13 is
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  -- code from book
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  procedure bv_lt ( bv1, bv2 : in bit_vector;  result : out boolean ) is
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    variable tmp1 : bit_vector(bv1'range) := bv1;
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    variable tmp2 : bit_vector(bv2'range) := bv2;
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  begin
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    tmp1(tmp1'left) := not tmp1(tmp1'left);
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    tmp2(tmp2'left) := not tmp2(tmp2'left);
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    result :=  tmp1 < tmp2;
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  end procedure bv_lt;
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  -- end code from book
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begin
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  stimulus : process is
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                       subtype byte is bit_vector(0 to 7);
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                     variable result : boolean;
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  begin
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    bv_lt( byte'(X"02"), byte'(X"04"), result );
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    assert result;
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    bv_lt( byte'(X"02"), byte'(X"02"), result );
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    assert not result;
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    bv_lt( byte'(X"02"), byte'(X"02"), result );
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    assert not result;
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    bv_lt( byte'(X"FC"), byte'(X"04"), result );
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    assert result;
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    bv_lt( byte'(X"04"), byte'(X"FC"), result );
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    assert not result;
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    bv_lt( byte'(X"FC"), byte'(X"FC"), result );
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    assert not result;
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    bv_lt( byte'(X"FC"), byte'(X"FE"), result );
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    assert result;
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    bv_lt( byte'(X"FE"), byte'(X"FC"), result );
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    assert not result;
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    wait;
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  end process stimulus;
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end architecture test;
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