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1 78957d3d Arnaud Dieumegard
ERROR: Unable to parse source file : /home/adieumeg/Documents/Repositories/lustrec-tests/vhdl_json/vhdl_files/ghdl/ghdl/testsuite/vests/vhdl-93/ashenden/compliant/ch_13_fg_13_20.vhd
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ERROR: Parse error at line 46 column 18:
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36: 
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37:                architecture structural of control_section is
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38: 
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39:                  component reg is
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40:                                  generic ( width : positive );
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41:                                port ( clk : in std_logic;
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42:                                       d : in std_logic_vector(0 to width - 1);
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43:                                       q : out std_logic_vector(0 to width - 1) );
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44:                  end component reg;
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45: 
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46:                  for flag_reg : reg
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                     ^
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47:                    use entity work.reg(gate_level)
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48:                    -- workaround for MTI bug mt023
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49:                    --  reverted for ghdl
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50:                    port map ( clock => clk, data_in => d, data_out => q );
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51:                    -- port map ( clock => clk, data_in => d, data_out => q, reset_n => '1' );
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52:                  -- end workaround
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53: 
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54:                  -- . . .
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55: 
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56:                  -- not in book
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WARN: Missing blame information for the following files:
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WARN:   * ch_13_fg_13_20.vhd
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WARN: This may lead to missing/broken features in SonarQube