CristalCaveGem » LustreC » Lustrec-Tests

-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc

-- This file is part of VESTs (Vhdl tESTs).

-- VESTs is free software; you can redistribute it and/or modify it

-- under the terms of the GNU General Public License as published by the

-- Free Software Foundation; either version 2 of the License, or (at

-- your option) any later version. 

-- VESTs is distributed in the hope that it will be useful, but WITHOUT

-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License

-- for more details. 

-- You should have received a copy of the GNU General Public License

-- along with VESTs; if not, write to the Free Software Foundation,

-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 

-- ---------------------------------------------------------------------

--

-- $Id: ch_15_regmpr.vhd,v 1.3 2001-11-03 23:19:37 paw Exp $

-- $Revision: 1.3 $

--

-- ---------------------------------------------------------------------

library ieee;

use ieee.std_logic_1164.all;

use work.dlx_types.all;

entity reg_multiple_plus_one_out_reset is

  generic ( num_outputs : positive;

            Tpd : delay_length );

  port ( d : in dlx_word;

         q0 : out dlx_word;

         q : out dlx_word_array(1 to num_outputs);

         latch_en : in std_logic;

         out_en : in std_logic_vector(1 to num_outputs);

         reset : in std_logic );

end entity reg_multiple_plus_one_out_reset;