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-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
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-- This file is part of VESTs (Vhdl tESTs).
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-- VESTs is free software; you can redistribute it and/or modify it
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-- under the terms of the GNU General Public License as published by the
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-- Free Software Foundation; either version 2 of the License, or (at
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-- your option) any later version.
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-- VESTs is distributed in the hope that it will be useful, but WITHOUT
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-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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-- for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with VESTs; if not, write to the Free Software Foundation,
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-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-- ---------------------------------------------------------------------
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--
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-- $Id: ch_04_ch_04_09.vhd,v 1.2 2001-10-26 16:29:37 paw Exp $
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-- $Revision: 1.2 $
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--
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-- ---------------------------------------------------------------------
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entity ch_04_09 is
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end entity ch_04_09;
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----------------------------------------------------------------
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architecture test of ch_04_09 is
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begin
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process_04_3_c : process is
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-- code from book:
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subtype name is string(1 to 20);
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type display_string is array (integer range 0 to 19) of character;
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variable item_name : name;
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variable display : display_string;
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--
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subtype big_endian_upper_halfword is bit_vector(0 to 15);
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subtype little_endian_upper_halfword is bit_vector(31 downto 16);
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variable big : big_endian_upper_halfword;
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variable little : little_endian_upper_halfword;
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-- end of code from book
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begin
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-- error: Incompatible types for assignment
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-- display := item_name; -- ilegal
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item_name := (others => 'A');
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little := x"AAAA";
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-- code from book:
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display := display_string(item_name);
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--
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big := little;
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little := big;
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-- end of code from book
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wait;
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end process process_04_3_c;
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----------------
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end architecture test;
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