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1
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{
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2
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"DESIGN_FILE" : {
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3
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"design_units" : [{
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4
|
"contexts" : [["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["SIMPLE_NAME", "MVL4"]]]]]], "library" : ["ENTITY_DECLARATION", {
|
|
5
|
"name" : ["IDENTIFIER", "ROM"], "ports" : [{
|
|
6
|
"names" : [["IDENTIFIER", "a"]], "mode" : ["in"], "typ" : {
|
|
7
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
|
8
|
"ranges" : [["RANGE_WITH_DIRECTION", {
|
|
9
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
|
10
|
"args" : [["EXPRESSION", {
|
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11
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"args" : [["CONSTANT_VALUE", {
|
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12
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"value" : ["CST_LITERAL", "15"]}
|
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13
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]]}
|
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14
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]]}
|
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15
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], "_to" : ["EXPRESSION", {
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16
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"args" : [["EXPRESSION", {
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17
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"args" : [["CONSTANT_VALUE", {
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18
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"value" : ["CST_LITERAL", "0"]}
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]]}
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20
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]]}
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]}
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22
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]]}
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]}
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}
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, {
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26
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"names" : [["IDENTIFIER", "d"]], "mode" : ["inout"], "typ" : {
|
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27
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"name" : ["SIMPLE_NAME", "MVL4_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
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28
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"ranges" : [["RANGE_WITH_DIRECTION", {
|
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29
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"direction" : "downto", "from" : ["EXPRESSION", {
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30
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"args" : [["EXPRESSION", {
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31
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"args" : [["CONSTANT_VALUE", {
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32
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"value" : ["CST_LITERAL", "7"]}
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33
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]]}
|
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34
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]]}
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35
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], "_to" : ["EXPRESSION", {
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"args" : [["EXPRESSION", {
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37
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"args" : [["CONSTANT_VALUE", {
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"value" : ["CST_LITERAL", "0"]}
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]]}
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40
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]]}
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]}
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42
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]]}
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]}
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44
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}
|
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45
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, {
|
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46
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"names" : [["IDENTIFIER", "rd"]], "mode" : ["in"], "typ" : {
|
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47
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic"]}
|
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48
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}
|
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49
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], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
|
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50
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]}
|
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51
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, {
|
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52
|
"contexts" : [], "library" : ["ARCHITECTURE_BODY", {
|
|
53
|
"name" : ["IDENTIFIER", "behavioral"], "entity" : ["IDENTIFIER", "ROM"], "ARCHITECTURE_DECLARATIVE_PART" : [], "ARCHITECTURE_STATEMENT_PART" : []}
|
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54
|
]}
|
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55
|
, {
|
|
56
|
"contexts" : [["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["SIMPLE_NAME", "MVL4"]]]]]], "library" : ["ENTITY_DECLARATION", {
|
|
57
|
"name" : ["IDENTIFIER", "SIMM"], "ports" : [{
|
|
58
|
"names" : [["IDENTIFIER", "a"]], "mode" : ["in"], "typ" : {
|
|
59
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
|
60
|
"ranges" : [["RANGE_WITH_DIRECTION", {
|
|
61
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"direction" : "downto", "from" : ["EXPRESSION", {
|
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62
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"args" : [["EXPRESSION", {
|
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63
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"args" : [["CONSTANT_VALUE", {
|
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64
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"value" : ["CST_LITERAL", "9"]}
|
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65
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]]}
|
|
66
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]]}
|
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67
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], "_to" : ["EXPRESSION", {
|
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68
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"args" : [["EXPRESSION", {
|
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69
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"args" : [["CONSTANT_VALUE", {
|
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70
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"value" : ["CST_LITERAL", "0"]}
|
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71
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]]}
|
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72
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]]}
|
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73
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]}
|
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74
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]]}
|
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75
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]}
|
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76
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}
|
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77
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, {
|
|
78
|
"names" : [["IDENTIFIER", "d"]], "mode" : ["inout"], "typ" : {
|
|
79
|
"name" : ["SIMPLE_NAME", "MVL4_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
|
80
|
"ranges" : [["RANGE_WITH_DIRECTION", {
|
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81
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
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82
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"args" : [["EXPRESSION", {
|
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83
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"args" : [["CONSTANT_VALUE", {
|
|
84
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"value" : ["CST_LITERAL", "31"]}
|
|
85
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]]}
|
|
86
|
]]}
|
|
87
|
], "_to" : ["EXPRESSION", {
|
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88
|
"args" : [["EXPRESSION", {
|
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89
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"args" : [["CONSTANT_VALUE", {
|
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90
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"value" : ["CST_LITERAL", "0"]}
|
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91
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]]}
|
|
92
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]]}
|
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93
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]}
|
|
94
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]]}
|
|
95
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]}
|
|
96
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}
|
|
97
|
, {
|
|
98
|
"names" : [["IDENTIFIER", "ras"], ["IDENTIFIER", "cas"], ["IDENTIFIER", "we"], ["IDENTIFIER", "cs"]], "mode" : ["in"], "typ" : {
|
|
99
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic"]}
|
|
100
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}
|
|
101
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], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
|
|
102
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]}
|
|
103
|
, {
|
|
104
|
"contexts" : [], "library" : ["ARCHITECTURE_BODY", {
|
|
105
|
"name" : ["IDENTIFIER", "behavioral"], "entity" : ["IDENTIFIER", "SIMM"], "ARCHITECTURE_DECLARATIVE_PART" : [], "ARCHITECTURE_STATEMENT_PART" : []}
|
|
106
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]}
|
|
107
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, {
|
|
108
|
"contexts" : [["USE_CLAUSE", [["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["SIMPLE_NAME", "MVL4"]]]]]], "library" : ["ENTITY_DECLARATION", {
|
|
109
|
"name" : ["IDENTIFIER", "memory_subsystem"], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
|
|
110
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]}
|
|
111
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, {
|
|
112
|
"contexts" : [], "library" : ["ARCHITECTURE_BODY", {
|
|
113
|
"name" : ["IDENTIFIER", "detailed"], "entity" : ["IDENTIFIER", "memory_subsystem"], "ARCHITECTURE_DECLARATIVE_PART" : [{
|
|
114
|
"declaration" : ["SIGNAL_DECLARATION", {
|
|
115
|
"names" : [["IDENTIFIER", "internal_data"]], "typ" : {
|
|
116
|
"name" : ["SIMPLE_NAME", "MVL4_logic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
|
117
|
"ranges" : [["RANGE_WITH_DIRECTION", {
|
|
118
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
|
119
|
"args" : [["EXPRESSION", {
|
|
120
|
"args" : [["CONSTANT_VALUE", {
|
|
121
|
"value" : ["CST_LITERAL", "31"]}
|
|
122
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]]}
|
|
123
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]]}
|
|
124
|
], "_to" : ["EXPRESSION", {
|
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125
|
"args" : [["EXPRESSION", {
|
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126
|
"args" : [["CONSTANT_VALUE", {
|
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127
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"value" : ["CST_LITERAL", "0"]}
|
|
128
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]]}
|
|
129
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]]}
|
|
130
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]}
|
|
131
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]]}
|
|
132
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]}
|
|
133
|
}
|
|
134
|
]}
|
|
135
|
, {
|
|
136
|
"declaration" : ["SIGNAL_DECLARATION", {
|
|
137
|
"names" : [["IDENTIFIER", "internal_addr"]], "typ" : {
|
|
138
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
|
139
|
"ranges" : [["RANGE_WITH_DIRECTION", {
|
|
140
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
|
141
|
"args" : [["EXPRESSION", {
|
|
142
|
"args" : [["CONSTANT_VALUE", {
|
|
143
|
"value" : ["CST_LITERAL", "31"]}
|
|
144
|
]]}
|
|
145
|
]]}
|
|
146
|
], "_to" : ["EXPRESSION", {
|
|
147
|
"args" : [["EXPRESSION", {
|
|
148
|
"args" : [["CONSTANT_VALUE", {
|
|
149
|
"value" : ["CST_LITERAL", "0"]}
|
|
150
|
]]}
|
|
151
|
]]}
|
|
152
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]}
|
|
153
|
]]}
|
|
154
|
]}
|
|
155
|
}
|
|
156
|
]}
|
|
157
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, {
|
|
158
|
"declaration" : ["SIGNAL_DECLARATION", {
|
|
159
|
"names" : [["IDENTIFIER", "main_mem_addr"]], "typ" : {
|
|
160
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic_vector"], "const" : ["INDEX_CONSTRAINT", {
|
|
161
|
"ranges" : [["RANGE_WITH_DIRECTION", {
|
|
162
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
|
163
|
"args" : [["EXPRESSION", {
|
|
164
|
"args" : [["CONSTANT_VALUE", {
|
|
165
|
"value" : ["CST_LITERAL", "9"]}
|
|
166
|
]]}
|
|
167
|
]]}
|
|
168
|
], "_to" : ["EXPRESSION", {
|
|
169
|
"args" : [["EXPRESSION", {
|
|
170
|
"args" : [["CONSTANT_VALUE", {
|
|
171
|
"value" : ["CST_LITERAL", "0"]}
|
|
172
|
]]}
|
|
173
|
]]}
|
|
174
|
]}
|
|
175
|
]]}
|
|
176
|
]}
|
|
177
|
}
|
|
178
|
]}
|
|
179
|
, {
|
|
180
|
"declaration" : ["SIGNAL_DECLARATION", {
|
|
181
|
"names" : [["IDENTIFIER", "ROM_select"]], "typ" : {
|
|
182
|
"name" : ["SIMPLE_NAME", "MVL4_ulogic"]}
|
|
183
|
}
|
|
184
|
]}
|
|
185
|
], "ARCHITECTURE_STATEMENT_PART" : [["COMPONENT_INSTANTIATION_STATEMENT", {
|
|
186
|
"name" : ["IDENTIFIER", "boot_ROM"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "ROM"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "behavioral"], "port_map" : [{
|
|
187
|
"formal_name" : ["SIMPLE_NAME", "a"], "actual_designator" : ["SLICE_NAME", {
|
|
188
|
"id" : ["SIMPLE_NAME", "internal_addr"], "range" : ["RANGE_WITH_DIRECTION", {
|
|
189
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
|
190
|
"args" : [["EXPRESSION", {
|
|
191
|
"args" : [["CONSTANT_VALUE", {
|
|
192
|
"value" : ["CST_LITERAL", "15"]}
|
|
193
|
]]}
|
|
194
|
]]}
|
|
195
|
], "_to" : ["EXPRESSION", {
|
|
196
|
"args" : [["EXPRESSION", {
|
|
197
|
"args" : [["CONSTANT_VALUE", {
|
|
198
|
"value" : ["CST_LITERAL", "0"]}
|
|
199
|
]]}
|
|
200
|
]]}
|
|
201
|
]}
|
|
202
|
]}
|
|
203
|
]}
|
|
204
|
, {
|
|
205
|
"formal_name" : ["SIMPLE_NAME", "d"], "actual_designator" : ["SLICE_NAME", {
|
|
206
|
"id" : ["SIMPLE_NAME", "internal_data"], "range" : ["RANGE_WITH_DIRECTION", {
|
|
207
|
"direction" : "downto", "from" : ["EXPRESSION", {
|
|
208
|
"args" : [["EXPRESSION", {
|
|
209
|
"args" : [["CONSTANT_VALUE", {
|
|
210
|
"value" : ["CST_LITERAL", "7"]}
|
|
211
|
]]}
|
|
212
|
]]}
|
|
213
|
], "_to" : ["EXPRESSION", {
|
|
214
|
"args" : [["EXPRESSION", {
|
|
215
|
"args" : [["CONSTANT_VALUE", {
|
|
216
|
"value" : ["CST_LITERAL", "0"]}
|
|
217
|
]]}
|
|
218
|
]]}
|
|
219
|
]}
|
|
220
|
]}
|
|
221
|
]}
|
|
222
|
, {
|
|
223
|
"formal_name" : ["SIMPLE_NAME", "rd"], "actual_designator" : ["SIMPLE_NAME", "ROM_select"]}
|
|
224
|
]}
|
|
225
|
], ["COMPONENT_INSTANTIATION_STATEMENT", {
|
|
226
|
"name" : ["IDENTIFIER", "main_mem"], "inst_unit" : ["SELECTED_NAME", [["SIMPLE_NAME", "work"], ["IDENTIFIER", "SIMM"]]], "inst_unit_type" : "entity", "archi_name" : ["IDENTIFIER", "behavioral"], "port_map" : [{
|
|
227
|
"formal_name" : ["SIMPLE_NAME", "a"], "actual_designator" : ["SIMPLE_NAME", "main_mem_addr"]}
|
|
228
|
, {
|
|
229
|
"formal_name" : ["SIMPLE_NAME", "d"], "actual_designator" : ["SIMPLE_NAME", "internal_data"]}
|
|
230
|
, {
|
|
231
|
"formal_name" : ["SIMPLE_NAME", "ras"], "actual_expr" : ["EXPRESSION", {
|
|
232
|
"args" : [["EXPRESSION", {
|
|
233
|
"args" : [["EXPRESSION", {
|
|
234
|
"args" : [["EXPRESSION", {
|
|
235
|
"args" : [["CONSTANT_VALUE", {
|
|
236
|
"value" : ["CST_LITERAL", "'0'"]}
|
|
237
|
]]}
|
|
238
|
]]}
|
|
239
|
]]}
|
|
240
|
]]}
|
|
241
|
]}
|
|
242
|
, {
|
|
243
|
"formal_name" : ["SIMPLE_NAME", "cas"], "actual_expr" : ["EXPRESSION", {
|
|
244
|
"args" : [["EXPRESSION", {
|
|
245
|
"args" : [["EXPRESSION", {
|
|
246
|
"args" : [["EXPRESSION", {
|
|
247
|
"args" : [["CONSTANT_VALUE", {
|
|
248
|
"value" : ["CST_LITERAL", "'0'"]}
|
|
249
|
]]}
|
|
250
|
]]}
|
|
251
|
]]}
|
|
252
|
]]}
|
|
253
|
]}
|
|
254
|
, {
|
|
255
|
"formal_name" : ["SIMPLE_NAME", "we"], "actual_expr" : ["EXPRESSION", {
|
|
256
|
"args" : [["EXPRESSION", {
|
|
257
|
"args" : [["EXPRESSION", {
|
|
258
|
"args" : [["EXPRESSION", {
|
|
259
|
"args" : [["CONSTANT_VALUE", {
|
|
260
|
"value" : ["CST_LITERAL", "'0'"]}
|
|
261
|
]]}
|
|
262
|
]]}
|
|
263
|
]]}
|
|
264
|
]]}
|
|
265
|
]}
|
|
266
|
, {
|
|
267
|
"formal_name" : ["SIMPLE_NAME", "cs"], "actual_expr" : ["EXPRESSION", {
|
|
268
|
"args" : [["EXPRESSION", {
|
|
269
|
"args" : [["EXPRESSION", {
|
|
270
|
"args" : [["EXPRESSION", {
|
|
271
|
"args" : [["CONSTANT_VALUE", {
|
|
272
|
"value" : ["CST_LITERAL", "'0'"]}
|
|
273
|
]]}
|
|
274
|
]]}
|
|
275
|
]]}
|
|
276
|
]]}
|
|
277
|
]}
|
|
278
|
]}
|
|
279
|
]]}
|
|
280
|
]}
|
|
281
|
]}
|
|
282
|
}
|