1
|
{
|
2
|
"DESIGN_FILE" : {
|
3
|
"design_units" : [{
|
4
|
"contexts" : [], "library" : ["ENTITY_DECLARATION", {
|
5
|
"name" : ["IDENTIFIER", "shift_adder"], "ports" : [{
|
6
|
"names" : [["IDENTIFIER", "addend"]], "mode" : ["in"], "typ" : {
|
7
|
"name" : ["SIMPLE_NAME", "integer"]}
|
8
|
}
|
9
|
, {
|
10
|
"names" : [["IDENTIFIER", "augend"]], "mode" : ["in"], "typ" : {
|
11
|
"name" : ["SIMPLE_NAME", "integer"]}
|
12
|
}
|
13
|
, {
|
14
|
"names" : [["IDENTIFIER", "sum"]], "mode" : ["out"], "typ" : {
|
15
|
"name" : ["SIMPLE_NAME", "integer"]}
|
16
|
}
|
17
|
, {
|
18
|
"names" : [["IDENTIFIER", "add_control"]], "mode" : ["in"], "typ" : {
|
19
|
"name" : ["SIMPLE_NAME", "bit"]}
|
20
|
}
|
21
|
], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
|
22
|
]}
|
23
|
, {
|
24
|
"contexts" : [], "library" : ["ARCHITECTURE_BODY", {
|
25
|
"name" : ["IDENTIFIER", "behavior"], "entity" : ["IDENTIFIER", "shift_adder"], "ARCHITECTURE_DECLARATIVE_PART" : [], "ARCHITECTURE_STATEMENT_PART" : []}
|
26
|
]}
|
27
|
, {
|
28
|
"contexts" : [], "library" : ["ENTITY_DECLARATION", {
|
29
|
"name" : ["IDENTIFIER", "reg"], "ports" : [{
|
30
|
"names" : [["IDENTIFIER", "d"]], "mode" : ["in"], "typ" : {
|
31
|
"name" : ["SIMPLE_NAME", "integer"]}
|
32
|
}
|
33
|
, {
|
34
|
"names" : [["IDENTIFIER", "q"]], "mode" : ["out"], "typ" : {
|
35
|
"name" : ["SIMPLE_NAME", "integer"]}
|
36
|
}
|
37
|
, {
|
38
|
"names" : [["IDENTIFIER", "en"]], "mode" : ["in"], "typ" : {
|
39
|
"name" : ["SIMPLE_NAME", "bit"]}
|
40
|
}
|
41
|
, {
|
42
|
"names" : [["IDENTIFIER", "reset"]], "mode" : ["in"], "typ" : {
|
43
|
"name" : ["SIMPLE_NAME", "bit"]}
|
44
|
}
|
45
|
], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
|
46
|
]}
|
47
|
, {
|
48
|
"contexts" : [], "library" : ["ARCHITECTURE_BODY", {
|
49
|
"name" : ["IDENTIFIER", "behavior"], "entity" : ["IDENTIFIER", "reg"], "ARCHITECTURE_DECLARATIVE_PART" : [], "ARCHITECTURE_STATEMENT_PART" : []}
|
50
|
]}
|
51
|
, {
|
52
|
"contexts" : [], "library" : ["ENTITY_DECLARATION", {
|
53
|
"name" : ["IDENTIFIER", "shift_reg"], "ports" : [{
|
54
|
"names" : [["IDENTIFIER", "d"]], "mode" : ["in"], "typ" : {
|
55
|
"name" : ["SIMPLE_NAME", "integer"]}
|
56
|
}
|
57
|
, {
|
58
|
"names" : [["IDENTIFIER", "q"]], "mode" : ["out"], "typ" : {
|
59
|
"name" : ["SIMPLE_NAME", "bit"]}
|
60
|
}
|
61
|
, {
|
62
|
"names" : [["IDENTIFIER", "load"]], "mode" : ["in"], "typ" : {
|
63
|
"name" : ["SIMPLE_NAME", "bit"]}
|
64
|
}
|
65
|
, {
|
66
|
"names" : [["IDENTIFIER", "clk"]], "mode" : ["in"], "typ" : {
|
67
|
"name" : ["SIMPLE_NAME", "bit"]}
|
68
|
}
|
69
|
], "ENTITY_DECLARATIVE_PART" : [], "ENTITY_STATEMENT_PART" : []}
|
70
|
]}
|
71
|
, {
|
72
|
"contexts" : [], "library" : ["ARCHITECTURE_BODY", {
|
73
|
"name" : ["IDENTIFIER", "behavior"], "entity" : ["IDENTIFIER", "shift_reg"], "ARCHITECTURE_DECLARATIVE_PART" : [], "ARCHITECTURE_STATEMENT_PART" : []}
|
74
|
]}
|
75
|
]}
|
76
|
}
|