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library ieee;
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use ieee.std_logic_1164.all;
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library ieee;
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use ieee.numeric_std.all;
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entity mul_524 is
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port (
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result : out std_logic_vector(31 downto 0);
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in_a : in std_logic_vector(31 downto 0);
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in_b : in std_logic_vector(14 downto 0)
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);
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end mul_524;
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architecture augh of mul_524 is
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signal tmp_res : signed(46 downto 0);
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begin
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-- The actual multiplication
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tmp_res <= signed(in_a) * signed(in_b);
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-- Set the output
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result <= std_logic_vector(tmp_res(31 downto 0));
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end architecture;
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