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entity testcase2_testbench is
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end entity testcase2_testbench;
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architecture bench of testcase2_testbench is
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    signal clk: bit;
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begin
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    dut: entity work.testcase2(empty) port map(clk => clk);
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    stimulus: process is
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    begin
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        -- Valid low and high pulses
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        clk <= '0';
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        wait for 10 ns;
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        clk <= '1';
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        wait for 10 ns;
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        -- Confirm that we're timing events, not transactions
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        clk <= '1';
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        wait for 5 ns;
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        -- Now send a short pulse to make the assertion fire        
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        clk <= '0';
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        wait for 5 ns;
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        -- Assertion should fire here, at 30ns
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        clk <= '1';
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        wait;
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    end process stimulus;
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end architecture bench;
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