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library IEEE;
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use IEEE.std_logic_1164.all;
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entity numeral_to_display is
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generic
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(
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-- To be moved into a converter.
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g_display_value_0: std_logic_vector(6 downto 0) := B"0000001";
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g_display_value_1: std_logic_vector(6 downto 0) := B"1001111";
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g_display_value_2: std_logic_vector(6 downto 0) := B"0010010";
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g_display_value_3: std_logic_vector(6 downto 0) := B"0000110";
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g_display_value_4: std_logic_vector(6 downto 0) := B"1001100";
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g_display_value_5: std_logic_vector(6 downto 0) := B"0100100";
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g_display_value_6: std_logic_vector(6 downto 0) := B"0100000";
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g_display_value_7: std_logic_vector(6 downto 0) := B"0001111";
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g_display_value_8: std_logic_vector(6 downto 0) := B"0000000";
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g_display_value_9: std_logic_vector(6 downto 0) := B"0000100";
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g_display_value_error: std_logic_vector(6 downto 0) := B"0110000"
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);
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port
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(
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i_numeral_time: in natural range 0 to 9; -- numeral input
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o_display: out std_logic_vector(6 downto 0) -- display output
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);
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end numeral_to_display;
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architecture Behavioral of numeral_to_display is
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begin
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with i_numeral_time select
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o_display <=
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g_display_value_0 when 0,
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g_display_value_1 when 1,
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g_display_value_2 when 2,
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g_display_value_3 when 3,
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g_display_value_4 when 4,
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g_display_value_5 when 5,
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g_display_value_6 when 6,
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g_display_value_7 when 7,
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g_display_value_8 when 8,
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g_display_value_9 when 9,
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g_display_value_error when others;
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end;
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