CristalCaveGem » LustreC » Lustrec-Tests

library IEEE;

use IEEE.std_logic_1164.all;

entity crossdomain_sync is

   port

   (

      i_clock:    in std_logic;  -- System clock.

      i_reset:    in std_logic;  -- System reset.

      i_signal:   in std_logic;  -- Asynchronous signal.

      o_signal:   out std_logic  -- Synchronous signal.

   );

end crossdomain_sync;

architecture Behavioral of crossdomain_sync is

   signal signal_r1: std_logic;

   signal signal_r2: std_logic;

begin

   P_R1_HANDLER: process (i_clock, i_reset)

   begin

      if (i_reset = '1')

      then

         signal_r1 <= '0';

      else

         if (rising_edge(i_clock))

         then

            signal_r1 <= i_signal;

         end if;

      end if;

   end process;

   P_R2_HANDLER: process (i_clock, i_reset)

   begin

      if (i_reset = '1')

      then

         signal_r2 <= '0';

      else

         if (rising_edge(i_clock))

         then

            signal_r2 <= i_signal;

         end if;

      end if;

   end process;

   o_signal <= signal_r2;

end;